Description
The CPU Subsystem Design Verification Engineer will verify complex CPU subsystems and their integration within next-generation Arm-based platforms. The role covers verification strategy, processor subsystem validation, reusable verification environments, test methodologies, coverage closure, RTL and system-level debugging, and collaboration with architecture, design, firmware, emulation, FPGA, validation, and post-silicon teams. Candidates need a relevant bachelor's or master's degree, 2–4 years of CPU, subsystem, or SoC verification experience, and strong knowledge of Verilog, SystemVerilog, UVM, and Arm CPU architecture. The role supports hybrid working, with team-specific patterns determined upon application.
