Custom Timing and Verification CAD Engineer at Apple

Apple is hiring an entry-level engineer to support and develop CAD flows and automation for transistor-level timing verification with NanoTime and formal verification with ESP. The role partners with analog and digital designers across multiple programs and technology nodes to set up verification runs, interpret results, resolve tool and methodology issues, and achieve sign-off. Responsibilities include improving flows and scripts, contributing to documentation, engaging with EDA vendors, and building automation to improve efficiency and scale. The minimum qualifications require a relevant bachelor's degree and 10 years of relevant industry experience, along with programming or scripting experience and solid transistor-level IC design and static timing analysis knowledge.