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DDRSS Validation Engineer (RTL + Silicon Debug) at Qualcomm International Inc., Mexico Branch Office

Department: ASICS Engineering

Compensation

$145,600 – $218,400/yr

Setup
On-site
Location
San Diego, California
Type
Full-time
Level
senior
Posted

Description

Qualcomm is hiring a SoC Validation Engineer to support next-generation SoC platforms through pre-silicon verification, emulation, and post-silicon validation. The role focuses on deep debugging in RTL/Verilog environments, silicon bring-up, firmware development in C, and validation of DDR, memory controllers, caches, and interconnects across simulation, emulation, and silicon platforms. The engineer will also develop validation tools, debug infrastructure, and automation, and collaborate with design, DV, system, and silicon validation teams. The position requires 6–9 years of SoC validation or related experience, along with a bachelor's, master's, or PhD in a science, engineering, or related field and the specified years of ASIC design, verification, validation, integration, or related experience.

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