Description
Intel Foundry is hiring a Design Enablement Applications and Support Technical Lead within its Design Technology Platforms organization. The role leads an engineering team delivering customer solutions for ASIC tools and flows, physical verification/runsets, tape-in verification, and IP sign-off for test chips using Intel PDK collateral. Responsibilities include setting priorities, allocating resources, driving cross-functional execution and issue resolution, mentoring engineers, and ensuring schedule, quality, and cost targets. The position requires substantial semiconductor design enablement, advanced-node process technology, physical design and verification, EDA, customer support, and technical leadership experience. It is hybrid and available in Hillsboro, Oregon; Phoenix, Arizona; Santa Clara, California; or Austin, Texas.
