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Design Engineer, Coherent High Speed Interconnect at NVIDIA

Department: Engineer, ASIC

Language
Setup
On-site
Location
Hsinchu · Taipei
Type
Full-time
Level
senior
Posted

Description

NVIDIA is hiring a Senior Design Engineer for its Coherent High Speed Interconnect team to work on the architecture and design of NVLINK-C2C interconnects for mobile SoCs and GPUs. The role involves collaborating with architects, external partners, software engineers, and circuit designers, optimizing designs against features, requirements, and system limitations, and applying knowledge of interconnect protocols, RTL design, performance analysis, and power optimization. A BS or equivalent in Electrical Engineering, Computer Engineering, or a related field is required, along with strong Verilog or System Verilog skills; a master's or PhD and mentoring experience are preferred.

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