Description
Arm is hiring a Memory Layout Designer in Noida to develop full-custom layouts for high-performance memory arrays and blocks, including floor planning, metal planning, layout optimization, and verification. The role covers physical design rules, DRC/LVS/DFM verification, electro-migration and IR checks, and complex memory-cell layouts. Candidates need at least two years of relevant layout design experience, a bachelor’s or master’s degree or equivalent education, and experience with Cadence Virtuoso layout systems.
