Description
Google is hiring a Design-for-Test (DFT) Engineer to develop and execute DFT solutions for complex ASICs, including array DFT, hierarchical DFT, scan, automatic test pattern generation, coverage debugging, RTL and gate-level verification, and silicon bring-up. The role requires a bachelor's degree in a relevant engineering field or equivalent practical experience, four years of DFT experience, and familiarity with ATPG, fault modeling, JTAG/TAP, and simulation. Preferred qualifications include a master's degree, Tessent and ICL experience, ATE validation, and Python or Tcl proficiency. The position is based in Tel Aviv or Haifa, Israel, and typically requires in-person interviews.
