Description
Micron Technology is hiring a Layout Build Engineer for its DRAM Team in Guadalajara, Mexico. The role focuses on building and developing analog, mixed-signal, and custom digital blocks and supporting full-chip integration, performing LVS/DRC and antenna verification, delivering high-quality block layouts, and coordinating with global engineering teams across multiple projects. Candidates need approximately five years of analog/custom layout experience in sophisticated CMOS processes, a BE or MTech in electronic or VLSI engineering or a related field, and expertise with Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS.
