Design Methodology – Principal DRAM Power Integrity Engineer at Micron

Micron Technology is hiring a Power Integrity / EMIR Analysis Engineer to develop and standardize EMIR methodology for DRAM products, perform static and dynamic EM/IR and PDN analysis, identify root causes of power-integrity issues, support chip-level signoff and tapeouts, and collaborate with design, verification, architecture, and EDA teams. The role requires a master’s degree in electrical or computer engineering and 8–14 years of experience in PDN, power integrity, or EMIR analysis for advanced semiconductor or SoC designs, along with hands-on experience with Ansys RedHawk or Totem and related analysis flows.