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Design Verification Engineer at Apple

Department: Hardware

Compensation

$150,400 – $225,300/yr

Location
Cupertino, California
Type
Full-time
Level
not_specified
Posted

Description

Apple is hiring an ASIC Verification Engineer to verify analog and mixed-signal ASIC IPs and ensure bug-free first silicon for a System on a Chip. The role develops test and coverage plans, verification methodology, environments, stimulus, checkers, assertions, trackers, and coverage; executes design bring-up, regression, and debug; and creates block, IP, and SoC-level test benches for interfaces such as camera and USB3. The position requires a master’s degree in electrical or computer engineering or a related field, along with experience using Verilog, System Verilog, Python, UVM, simulation and debugging tools, and verification flows. It is a 40-hour-per-week role with a base-pay range of $150,400 to $225,300 per year.

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