Apple is hiring a Design Verification Engineer to enable fully functional first silicon for IP designs. The role covers pre-silicon verification, including DV methodology, test planning, SystemVerilog/UVM environments, stimulus and checkers, test writing, debugging, coverage, RTL freeze sign-off, and tape-out readiness. The engineer will develop scalable test benches, track bugs and coverage, debug regressions, and use LLMs to improve verification efficiency and quality.
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