Description
Lightmatter is seeking a Design Verification Engineer to join their interdisciplinary team. The role involves collaborating with digital, photonic, and analog designers, utilizing UVM testbench techniques, Real Number Modeling (RNM), and AMS verification methods to ensure design integrity. The engineer will also work with the Architecture team to understand system requirements and lead performance verification, while enhancing skills in mixed-signal verification, post-silicon validation, formal verification, emulation, and performance modeling. The position requires a minimum of 8 years of design verification and SystemVerilog experience, 2+ years of Python experience, and expertise in the UVM library.
