Description
MatX is hiring a Silicon Verification Engineer to develop scalable verification methodology and testbenches for silicon across compute, memory management, high-speed connectivity, and other key technologies. The role owns subsystem and chip-level verification execution, drives test plans and sign-off reviews, and supports verification closure through design freeze and tapeout. Candidates need concept-to-silicon verification experience, proficiency with SystemVerilog, Python, C/C++, Bluespec, and similar languages, production experience with UVM and assertion-based verification, and strong knowledge of high-performance silicon micro-architecture. The position offers a US base salary of $160,000–$600,000 plus equity, depending on career level, along with medical, dental, vision, retirement, and other benefits.
