Description
Microsoft is hiring a Design Verification Engineer II for its Silicon, Cloud Hardware, and Infrastructure Engineering organization to verify custom IP, IP subsystems, and hardware manufacturing processes. The role involves defining verification strategies, developing UVM-based and formal verification environments, running and debugging simulations, applying random-stimulus and coverage-based techniques, improving verification efficiency, and mentoring others. Candidates need a relevant master's degree with at least one year of technical engineering experience, or a relevant bachelor's degree with at least two years of experience, plus the ability to meet Microsoft security and export-control requirements. The typical U.S. base pay range is USD 102,100–202,200 per year, with higher ranges for the San Francisco Bay area and New York City metropolitan area.
