Description
STMicroelectronics is seeking an experienced Digital Verification Engineer to serve as a Technical Leader in its Imaging verification team. The role owns end-to-end verification strategy and closure for complex digital IPs and subsystems, leads UVM-based and protocol-level verification, applies formal verification, reviews test plans and collateral, mentors junior engineers, and drives verification methodology and process improvements. The position requires a degree in electronics, electrical, or computer engineering, 5–7 years of digital design or IP verification experience, and expertise in System Verilog, UVM, coverage, simulation tools, formal verification, protocols, and scripting.
