Description
Annapurna Labs is hiring a DFT Engineer to design and implement advanced Design-for-Test architectures for complex semiconductor platforms, develop test and debug patterns, perform static timing analysis across DFT modes, verify DFT logic, and support silicon bring-up and device diagnostics. The role requires a bachelor's degree in electrical or computer engineering and at least four years of semiconductor DFT experience; experience with chip design, Verilog, scan insertion, ATPG, gate-level simulation, UVM, FPGA, emulators, and Perl or Tcl is preferred.
