Description
Arm is hiring a DFT Engineer to architect, implement, and validate design-for-test techniques on test chips and hard macros. The role inserts DFT logic at RTL and gate levels, generates ATE test patterns, and collaborates with RTL, verification, physical implementation, synthesis, timing, and silicon test teams through project tape-out and silicon characterization. Candidates need 2–5 years of DFT experience, Verilog/TCL/Perl coding ability, Unix/Linux proficiency, and a bachelor’s or master’s degree or equivalent experience in a relevant engineering field.
