Description
Mythic is seeking a DFT Engineer to implement DFT features on their chips. The role involves working on all aspects of DFT for sub-system-level blocks within the SoC, including MBIST, IJTAG, Scan, and ATPG. The engineer will contribute to methodology development, establish DFT flows, and be involved in every phase of the design cycle from concept to silicon. This position also offers exposure to deep neural networks (DNNs) and collaboration with RTL, Physical design, STA, and analog design teams.
