Description
NextSilicon is hiring a DFT Engineer to define and implement design-for-test architectures and methodologies for its next-generation SoC. The role covers scan, MBIST, boundary scan, fault-model analysis, test development, RTL and gate-level verification, and collaboration with test engineering and other cross-functional teams. Candidates must have at least 8 years of DFT methodology and implementation experience, strong digital design and test knowledge, experience with EDA tools and scripting languages, and a proven record of developing complex custom ASIC products and successfully taping out several ASICs.
