Description
Synopsys is hiring a DFT Staff Engineer to own digital design-for-test architecture, implementation, integration, and verification for complex SoCs and subsystems from specification through tapeout. The role defines scan, ATPG, memory BIST, logic BIST, and analog/PHY test strategies; drives DFT signoff readiness; develops reusable methodologies; and collaborates with silicon validation, RTL, functional verification, physical design, timing, and power teams. The engineer will improve coverage, yield, test time, and cost while supporting production outcomes in high-performance computing, automotive, and aerospace domains.
