Description
The role supports SoC DFT design activities by running DFT pattern simulations, static and dynamic checks, and documentation; assists with DFT AI Flow development under senior engineers; and contributes to engineering quality, learning, and teamwork. Candidates should be pursuing a master’s degree in a relevant engineering or computer science discipline, have familiarity with SoC digital design, verification, programming, and EDA tools, and demonstrate strong engineering fundamentals, problem-solving, testing, documentation, collaboration, and English communication skills.
