Description
Arago is hiring a digital hardware engineer to design, implement, and verify RTL blocks for memory, control, and compute subsystems within its custom multiphysics computation unit. The role collaborates with system software and architecture teams, develops functional verification infrastructure, supports synthesis and timing analysis, and contributes to hardware-software co-design for advanced AI/ML applications. The position requires extensive RTL design experience, digital architecture knowledge, functional verification skills, and familiarity with ASIC and FPGA design flows.
