Description
Neuralink is hiring a Digital IC Design Engineer Intern to design and implement low-power digital architectures and hardware accelerators for wireless brain-computer interfaces. The role covers micro-architecture, RTL, digital signal processing pipelines, hardware/software interfaces, system modeling, verification, FPGA emulation, analog co-simulation, testability, and silicon bring-up. Candidates need evidence of exceptional ability in electrical, computer, or computer engineering, at least two years of digital design experience, and proficiency in SystemVerilog, C/C++, and Python. The position offers a California hourly flat rate of $35 USD and benefits for full-time employees, with interns initially excluded from some benefits.
