Digital RTL Verification Engineer at BoschGroup

Location: Bengaluru, Karnataka
Level: not_specified
Posted: Jul 22, 2026

Description

This job involves verifying SoCs, automotive ASICs, subsystems, and IPs using various methodologies like Metric-driven Verification (MDV) and Formal Verification. The role includes developing and tracking verification plans, creating verification environments, integrating VIP, analyzing regression results, and continuously improving verification processes.

Required Skills

System Verilog
UVM
Constrained Random Verification
Functional Coverage Code
Verification Environments
Cadence/Synopsys/Mentor Tools
Scripting Language
Perl TCL
AMBA Protocols
ARM Processor-Based Subsystem/SoC Verification

Additional Information

Required Previous Experiences: 5 to 10 years of Experience in Digital RTL verification using System Verilog and UVM.
Must have been a part of one or more ASIC/SoC tape outs.
Preferred Qualifications: Experience of developing verification environments from scratch is desirable.
Formal verification experience is a desirable but not must.
SPECMAN knowledge is a desirable but not must