Description
The Digital Verification Engineer will join Google's Research and Development team to develop custom silicon solutions. The role owns quality-assurance strategies from concept through tape-out, including planning RTL verification, creating constrained-random and formal verification environments, writing coverage measures, debugging test failures, and analyzing coverage metrics. The position requires a bachelor's degree in electrical engineering or a related field, one year of verification experience, and RTL verification experience with SystemVerilog or Specman/E for FPGAs or ASICs. Preferred qualifications include a master's or PhD, UVM experience, full verification lifecycle experience, ASIC interface and memory-system experience, and ASIC performance verification experience. The role is based in Tel Aviv or Haifa, Israel, and typically requires in-person interviews.
