Description
Nexthop AI is hiring a full-time Digital Verification Engineer in Santa Clara, California, to own verification environments and test suites for FPGA and ASIC digital subsystems. The role covers testbench development, reusable verification components, reference modeling, directed and constrained-random testing, functional and code coverage, SVA assertions, logic simulation, regression, waveform debugging, FPGA and board bring-up, and hardware–software co-validation. Candidates need 3–7 years of digital verification experience, Verilog proficiency, simulator experience, and a BS/MS in a relevant engineering field.
