Description
The role leads complete ARM-based SoC-level verification activities, including verification planning, architecture definition, test-bench development, UVM-based components, random stimulus, RTL and assertion analysis, debugging, gate-level simulation, and verification-flow improvement. It requires 12–15 years of experience, a bachelor’s or master’s degree in Electronics or Computer Science, and expertise in VHDL/Verilog, System Verilog, C, UVM, SoC architecture, bus protocols, interconnects, memory subsystems, communication and graphics protocols, scripting, and simulation tools.
