Description
NVIDIA is hiring a DPU Performance Validation Engineer to characterize, debug, and validate the performance and functional behavior of current and future DPU silicon across single-die and multi-die systems. The role involves RTL-level debugging, waveform analysis, system-level performance root-cause analysis, validation methodology development, and automation of debug and validation tasks. Candidates need a relevant bachelor's degree, at least three years of ASIC development or validation experience, strong ASIC debugging skills, system-level performance validation experience, and proficiency with Python and C/C++ in Linux.
