Description
Micron Technology is hiring a Layout Design Engineering Intern to develop and verify analog and digital IP layout cells for memory products. The intern will work with experienced layout engineers on floorplanning, placement, routing, DRC, and LVS verification, prepare technical reports, and create SKILL-based automation solutions using scripting and AI-supported development. The role requires a student pursuing a relevant bachelor's degree, expected graduation in December 2027, and experience with at least one scripting language; semiconductor layout, EDA tools, and AI applications are preferred.
