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DRAM Memory Design Engineer - Principal | MTS | SMTS at Micron

Department: DTPG

Setup
On-site
Location
Boise, Idaho
Type
Full-time
Level
senior
Posted

Description

Micron Technology is hiring a Semiconductor Design Engineer to design and optimize digital and analog circuits for next-generation DRAM products. The role leads circuit development, simulation, verification, silicon validation, floor planning, layout optimization, parasitic analysis, and tape-out, while collaborating with global design, verification, and multi-functional teams. Responsibilities also include advancing AI-assisted design, automation, and design-space exploration, and providing technical leadership and mentorship. The position is based at Micron’s main site in Boise, Idaho, with a five-day onsite schedule.

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