Description
Celero Communications Inc. is hiring a Digital Signal Processing Design Engineer to research, develop, and optimize DSP algorithms and blocks for high-speed optical communication systems and optical transceivers. The role includes designing equalization, timing recovery, carrier phase recovery, polarization demultiplexing, and nonlinear compensation algorithms; developing optical link simulation models; analyzing performance under impairments; verifying floating-point and fixed-point implementations; creating bit-accurate and cycle-accurate models for ASIC implementation; and collaborating with ASIC, firmware, and verification teams. The position is based in Ottawa or Vancouver and offers a $150,000–$250,000 annual base salary.
