Qualcomm International Inc., Mexico Branch Office

Emulation Performance/Debug Engineer at Qualcomm International Inc., Mexico Branch Office

Department: ASICS Engineering

Compensation

$121,800 – $182,600/yr

Setup: On-site
Location: San Diego, California
Type: Full-time
Level: mid
Posted: Sep 17, 2026

Description

Qualcomm is seeking an ASIC Emulation Engineer to support pre-silicon SoC platforms, including FPGA-based emulation, synthesis, place-and-route, timing closure, system debug, and bring-up of emulation hardware and software. The role covers SoC functionality, CPU and DSP cores, multimedia, I/O, peripherals, DDR, modems, bus protocols, digital-circuit validation, and low-level software and hardware debugging. Candidates need a bachelor's, master's, or PhD in a science, engineering, or related field plus ASIC design, verification, validation, integration, or related experience; preferred qualifications include 5+ years of emulation and silicon experience, Verilog/SystemVerilog, C, Python, TCL, and Xilinx or Intel FPGA expertise. The listed pay range is $121,800 to $182,600.

Required Skills

FPGA prototyping
Timing closure
System debug
Verilog
SystemVerilog
C programming
Python
TCL
Xilinx FPGA
Intel FPGA

Additional Information

Minimum Education: Bachelor's degree in Science, Engineering, or a related field with 2+ years of ASIC design, verification, validation, integration, or related experience; alternatively, a master's degree with 1+ year of such experience, or a PhD in a related field.
Required Previous Experiences: 2+ years of ASIC design, verification, validation, integration, or related work experience
Preferred Qualifications: 5+ years of experience in emulation and silicon environments
Design, development, and deployment of emulation build generation and debug methodologies across FPGA platforms
Cross-site collaboration, vendor engagements, and executive communication
Pre-silicon prototyping, enablement, and bring-up of SoC designs
Bring-up of FPGA emulation and prototyping hardware and software
Debugging low-level software and hardware issues
JTAG and kernel debugging
Digital-circuit validation and debugging
CPU and SoC architecture knowledge
Power and performance understanding
Verilog and SystemVerilog expertise
C programming experience
Python and TCL scripting
Xilinx and Intel FPGA expertise