Description
Synopsys is seeking a passionate and detail-oriented engineer to drive advancements in chip design and optimization. This role involves designing and analyzing delay calculation and STA algorithms, driving the success of Synopsys' physical design flow and EDA tools, collaborating with cross-functional teams, contributing to innovative solutions for STA challenges, implementing algorithmic improvements, and participating in code reviews. The successful candidate will accelerate the evolution of advanced chip design, enhance the performance of Synopsys’ physical design tools, and drive efficiency in design flows.
