Description
Micron Technology is hiring a Layout Engineer for its HBM Team in Hyderabad, India. The role focuses on analog, mixed-signal, custom digital, and full-chip layout design and verification for high-bandwidth memory applications supporting artificial intelligence and high-performance computing. Responsibilities include LVS/DRC and antenna verification, block-level layout delivery, project scheduling, peer guidance, and coordination with local engineering teams. Candidates need 2–5 years of analog/custom layout experience in advanced CMOS processes, expertise in Cadence VLE/VXL and Mentor Graphic Calibre, and a BE or MTech in electronic or VLSI engineering.
