Description
NXP is seeking a Digital SoC Design Intern in Sophia Antipolis, France, to automate Design-for-Test processes for System-on-Chip designs. The intern will work on DFT architecture, RTL integration, DFT verification, design-flow documentation, and related design automation using Verilog, Python, Perl, and Tcl. The role is intended for a current Master's student in electrical engineering, microelectronics, computer engineering, or a related field, with strong digital IC design, verification, and test-methodology knowledge.
