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Engineering Internship: Low-Power Verification Techniques Using UVM, Formal Proof, and AI Capabilities (M/F) at NXP

Language
Location
Valbonne, Provence-Alpes-Côte d'Azur
Type
Full-time, Internship
Level
intern
Posted

Description

NXP is recruiting a final-year engineering intern for a 6-month internship starting in the first quarter of 2027 to improve the digital verification of power management in NFC components. The role is based in Sophia Antipolis and covers functional verification of SoC power-management architecture, SystemVerilog testbenches and assertions, simulation analysis, formal verification with Jasper Formal Proof, and exploration of AI/ML tools for analog and mixed-signal verification. Candidates should have a Bac + 5 engineering education, foundational knowledge of digital design and SystemVerilog, strong analytical and autonomous skills, and a good level of English.

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