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Engineering Internship: Analysis of Power Consumption and Test Optimization for Next-Generation System-on-Chips (SoCs) (M/F) at NXP

Language
Location
Valbonne, Provence-Alpes-Côte d'Azur
Type
Full-time, Internship
Level
intern
Posted

Description

NXP Semiconductors is hiring a 6-month internship for a DFT-focused role in its Advanced Chip Engineering team in Sophia Antipolis (Valbonne). The intern will study Design-for-Test methodologies, hardware emulation, test power, coverage, fault models, and silicon yield; analyze large simulation and production datasets; apply AI to detect patterns and anomalies; develop Python automation; and collaborate with chip-design and silicon-validation engineers. The role is intended for Master's-level or engineering-school students in electronics, microelectronics, embedded systems, or a related field, with Python, AI, digital design, and English skills required.

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