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Failure Analysis Engineer at Power Integrations

Compensation

$76,854 – $121,153/yr

Location
San Jose, California
Type
Full-time
Level
mid
Posted

Description

The Silicon Level Failure Analysis Engineer will perform device-level failure analysis on power integrated circuits to isolate faults, characterize defects, determine root causes, and provide technical reports and corrective actions for RMA and customer issues. The role requires at least two years of relevant experience, knowledge of digital and analog circuits, device physics, IC fabrication, ATE test data, schematics, and layout, and hands-on experience with fault-isolation and characterization tools. The position offers an annual base salary of $76,854 to $121,153 in California, along with equity, medical benefits, ESPP, 401K, tuition reimbursement, and time off programs.

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