Description
Apple is hiring an Integration Engineer in Austin, Texas to integrate internal and external intellectual property, design system and control bus logic, and own the integration specification for a design project. The role includes integrating and optimizing memories and hard macros, running synthesis, netlist generation, and timing closure, collaborating with architecture, verification, physical design, DFT, and power teams to achieve first tape-out, and developing design methodology and checks. The position requires a master’s degree or foreign equivalent in a relevant engineering field and experience with System Verilog or Verilog RTL, multi-clock and reset domains, low-power techniques, Synopsys or Cadence synthesis, memory interfaces, design-for-test, and CAD tools. It is a 40-hour-per-week role.
