Description
The Formal Verification Engineer will work on Apple Silicon’s next-generation, high-performance, power-efficient processor and system-on-chip (SoC). The role covers formal verification of single or multiple design blocks and IP, including security-enclave micro-architecture specifications, security-requirement test plans, property proving, bug finding, attack-modeling, reusable formal models, verification code, and correct-by-construction methodologies. The position requires a bachelor’s degree and experience in silicon validation software engineering or a related field.
