Description
The Formal Verification Engineer will work on Apple Silicon’s next-generation processor and system-on-chip (SoC), developing formal micro-architecture specifications, security requirement test plans, formal models, verification code, and correct-by-construction methodologies. The role collaborates with design teams across CPU, cellular, connectivity, audio, image processing, neural networks, memory, security, peripheral, interconnect, and power-management subsystems to prove design properties, find bugs, and improve micro-architecture robustness.
