FPGA Design Engineer at ADCI - Karnataka

Department: alexa-and-amazon-devices

Compensation

$136,000 – $184,000/yr

Setup: On-site
Location: Washington, Arkansas
Type: Full-time
Level: senior
Posted: Aug 18, 2026

Description

The FPGA Design Engineer will create, implement, test, release, and support FPGA-based solutions for LEO’s optical inter-satellite link system. The role owns FPGA bitstreams through architecture, RTL design, physical implementation, timing closure, simulation, and silicon validation; collaborates with systems, hardware, and firmware teams; and drives trade-off analysis for cost, size, power, performance, and features. The position requires at least four years of mechanical engineering or equivalent experience, FPGA and ASIC design and verification experience, Xilinx/AMD or Altera FPGA experience, and familiarity with uArchitecture, RTL, CDC, RDC, and simulation. The role is based in Redmond, Washington, with a base salary of $136,000 to $184,000 annually.

Required Skills

FPGA design
uArchitecture
RTL coding
System Verilog
UVM
Xilinx/AMD FPGAs
Python
AXI4
AXI Streaming

Additional Information

Required Previous Experiences: 4+ years of mechanical engineering or equivalent experience
Experience with prototyping and implementation
3+ years of ASIC/FPGA design and verification tools experience
3+ years of ASIC/FPGA design verification using System Verilog and UVM
Experience with Xilinx/AMD or Altera FPGAs
Experience with uArchitecture, RTL coding, lint checks, CDC, RDC, FPGA optimization, simulation, and validation
Preferred Qualifications: Knowledge of SolidWorks simulation or Ansys finite element analysis tools
Experience designing complex mechanical products and equipment at volume
5+ years of full RTL development life cycle experience
Experience developing Python tests for hardware testing
Experience designing digital logic for control, communication, and data acquisition systems
Deep understanding of FPGA logic elements, memory blocks, DSP slices, and I/O capabilities
Familiarity with AXI4 and AXI Streaming interfaces
Proven track record of taking FPGA/ASIC designs through production and deployment
Experience integrating HDL simulation and hardware-in-the-loop testing into CI/CD pipelines