FPGA Design Engineer at flir

Language

Setup: Hybrid
Location: Seville, Andalusia
Type: Full-time
Level: not_specified
Posted: Sep 2, 2026

Description

Teledyne Technologies is hiring an FPGA Design Engineer at Teledyne Sevilla to design, develop, and validate hardware architectures for computer vision systems. The role involves embedded hardware and hardware-software solutions, HDL model testing, test-platform development, system-level simulation, and integration with multidisciplinary teams. Candidates need a degree in telecommunications, electronics, or a related field, plus experience with VHDL or Verilog, FPGA development tools, digital-circuit simulation and verification, communication interfaces, embedded systems, and Python or MATLAB.

Required Skills

VHDL/Verilog
FPGA tools
Digital verification
Communication protocols
Python
MATLAB

Additional Information

Minimum Education: Degree in Telecommunications Engineering (specialization in Electronics), Electronic Engineering, or a related field
Required Previous Experiences: Experience programming programmable logic devices with VHDL or Verilog
Experience with FPGA development tools from Intel (Altera) and AMD (Xilinx)
Experience simulating and verifying digital circuits for FPGA implementation
Experience developing and integrating UART, USB, Ethernet, and other communication interfaces
Practical experience with electronic laboratory equipment
Knowledge of microprocessor-based embedded systems
Translation Company Name: Teledyne Innovaciones Microelectronicas, S.L.U.

About flir

flir

Thermal imaging

We don’t just come to work every day. We come to make a difference every day. We have the privilege of helping save lives and livelihoods. Our products are used in a wide array of situations to rescue people in danger, detect criminals, conserve energy, navigate safely, provide security around the globe, and protect our environment. We empower real-life heroes to do their jobs more effectively and it’s and honor and responsibility that fuels everything we do.

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