FPGA Development Tools Engineer at Altera

The Senior FPGA Device Modeling Engineer will develop and automate tests for FPGA device and simulation models used with Altera Quartus Prime, manage end-to-end validation and regression flows, maintain reference results and test infrastructure, and build C++, Tcl, Python, and bash tools. The role also covers debugging synthesis, fitter, and model failures, integrating tests into CI pipelines, and improving quality metrics and documentation. It requires a relevant BS/MS/PhD, 4–5 years of experience, digital design and FPGA/ASIC flow knowledge, scripting and C++ skills, and familiarity with Linux and build workflows.