Description
The FPGA Engineer will develop and optimize SDR and FPGA systems, including high-level architectures, VHDL/Verilog code, software applications, simulations, hardware testing, and debugging. The role requires at least three years of SDR development experience, Linux and VHDL experience, FPGA toolchain knowledge, RF communications and test-equipment familiarity, and a BS or MS in a relevant engineering or science field. The salary range is $130,000–$180,000, with medical, dental, vision, prescription drug, HRA, life insurance, disability, paid leave, retirement matching, bonuses, referral bonuses, and tuition reimbursement benefits.
