Description
Optiver is hiring an FPGA Engineer to design high-speed hardware for network infrastructure and trading systems, research low-latency techniques, and integrate FPGAs with server hardware. The role requires a student pursuing a bachelor’s, master’s, or PhD in a relevant engineering field, with graduation expected between December 2026 and June 2027, and experience in digital design, VHDL, Verilog, or System Verilog. The position offers a $200,000 USD base salary, performance-based bonus, profit-sharing, retirement matching, and comprehensive health, dental, vision, disability, and life coverage.
