Description
The role is a full-time FPGA digital design engineer responsible for translating probabilistic algorithms into pipelined FPGA RTL, designing custom digital logic, integrating high-speed I/O, developing system architecture, creating verification testbenches, and debugging hardware. The position requires an electrical or computer engineering degree, at least five years of FPGA digital design experience, strong HDL and embedded development skills, knowledge of processor-side FPGA SoC platforms, and experience with design and verification tools.
