FPGA IP Prototyping at Synopsys

Location: Bengaluru, Karnataka
Type: Full-time
Level: senior
Posted: Apr 7, 2026

Description

Synopsys is hiring an IP Prototyping Staff Engineer for its FPGA Design and Verification IP Prototyping team in Bengaluru, India. The role designs, implements, and verifies FPGA-based hardware prototypes of controllers and PHY interface IPs, validates them against real-world devices and test equipment, creates technical documentation, executes test plans, and troubleshoots potential ASIC issues. The position requires an electrical engineering degree, at least five years of FPGA design and development experience, and expertise in Verilog, System Verilog, scripting, interfaces, FPGA tools, and digital design methods.

Required Skills

FPGA design
Verilog
System Verilog
Tcl
Python
AMBA AXI
Xilinx Vivado
Static timing analysis

Additional Information

Minimum Education: Bachelor's or master's degree in electrical engineering
Required Previous Experiences: 5+ years of FPGA design and development experience
Design and simulation of integrated circuitry using Verilog and System Verilog
Expertise with industry-standard scripting languages including Tcl, Python, Perl, and Bash
Expertise with industry-standard interfaces and protocols such as AMBA AXI or APB
Experience with FPGA development tools such as Xilinx Vivado
Experience with digital design methods including floor planning, timing constraints, and static timing analysis
Preferred Qualifications: Familiarity with Synopsys Synplify or Protocompiler
Expertise with HAPS-100 and HAPS-80 boards and Protocompiler flows
Familiarity with SD/eMMC and (LP)DDR peripheral interfaces
Familiarity with VCS simulation tools
Familiarity with oscilloscopes and protocol analyzers
Translation Company Name: Synopsys