Description
The role focuses on timing closure for complex GPU designs used in Apple products, collaborating with architecture, RTL, synthesis, physical design, DFT, clocking, and post-silicon engineering teams. Responsibilities include translating physical design constraints to backend flows, optimizing designs for power, performance, and timing, configuring DFT modes, assembling top-level STA, automating STA reporting, running ECO flows, supporting tapeout signoff, and improving EDA analysis flows. The position requires a bachelor's degree in Computer Science or Computer Engineering, relevant physical design, synthesis, DFT, clocking, digital logic, RTL, DV, CMOS, or VLSI experience or coursework, and scripting experience; a master's degree and prior timing closure or physical design experience are preferred.
