Description
The role focuses on timing closure for complex GPU designs used in Apple products, collaborating with architecture, RTL, synthesis, physical design, DFT, clocking, and post-silicon engineering teams. Responsibilities include translating physical design constraints to backend flows, optimizing designs for power, performance, and timing, configuring DFT modes, assembling top-level STA, automating STA reporting, running ECO flows, supporting tapeout signoff, and improving EDA analysis flows. The minimum qualifications are a bachelor's degree in Computer Science or Computer Engineering, three years of relevant experience, STA and timing closure or physical design experience, and scripting experience with languages such as TCL, Python, Perl, or shell scripting.
